When comes to modern electronic systems, high performance and low-power consumptions tend to be the two main considerations for designers. In many electronic system design environment, a system (or chip) architecture development team is responsible for designing a system architecture that allows for the highest performance of an electronic system (or chip), while a power analysis team is responsible for minimizing the power consumption of the electronic system.
Typically, the system architecture development effort happens separately from any power analysis effort. For example, the power analysis team will begin working on system power estimation only after a reasonable system architecture has been developed. Since there is usually no informational link between the source system architecture and the power information, a general disconnection commonly occurs between system architecture development and power analysis, and the disconnection can introduce opportunities for architecture translation errors and power information errors without any traceability or version control.
The present disclosure provides an improved method and apparatus for furnishing system power estimations for electronic system designs in order to serve as a bridge between system architecture development and power analysis.